Processor-based turbo interleaver for multiple third-generation wireless standards

Author

Shin, Myoung-Cheol ; Park, In-Cheol

Author_Institution

Electr. Eng. & Comput. Sci. Dept., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

7

Issue

5

fYear

2003

fDate

5/1/2003 12:00:00 AM

Firstpage

210

Lastpage

212

Abstract

A software turbo interleaver running on a SIMD processor is presented for a turbo decoder supporting multiple 3G wireless standards. To hide the timing overhead of interleaver changing, the interleaver generation is split into two parts, preprocessing and incremental on-the-fly generation. Applying the proposed approach, we implemented a W-CDMA and cdma2000 interleaver that generates one interleaved address per cycle and occupies 10% area of the ROM implementation.

Keywords

3G mobile communication; broadband networks; code division multiple access; decoding; interleaved codes; parallel processing; telecommunication standards; turbo codes; 3G wireless standards; SIMD processor; W-CDMA; cdma2000; interleaver changing; interleaver generation; multiple third-generation wireless standards; processor-based turbo interleaver; software turbo interleaver; turbo decoder; Channel coding; Concatenated codes; Decoding; Land mobile radio; Mobile communication; Multiaccess communication; Read only memory; Software standards; Timing; Turbo codes;

fLanguage

English

Journal_Title

Communications Letters, IEEE

Publisher

ieee

ISSN

1089-7798

Type

jour

DOI

10.1109/LCOMM.2003.812176

Filename

1200183