Statistical design techniques for D/A converters

Techniques for the design of high-resolution digital-to-analog converters (DACs) that use precision-matched components are described. Statistical models, based on test chip data, that realistically describe both local mismatches and longer range spatial correlations are investigated. These models have been incorporated into a special-purpose DAC analysis/simulation tool (DACSIM) to provide a powerful Monte-Carlo yield estimation capability. DACSIM also performs accurate DC simulation of a large class of resistor-network DAC circuits taking into account many important parasitic effects, including superposition nonlinearities. An error-corrected DAC architecture that uses the concept of a generalised decoding strategy programmable at test has been validated in a CMOS 13 bit segmented current-switched DAC. The approach exhibits the potential for attaining very high accuracy without trimming