DocumentCode
1223622
Title
Custom MOS VLSI design: tools and methods
Author
Kleinfelder, Stuart A.
Author_Institution
Lawrence Berkeley Lab., California Univ., CA, USA
Volume
36
Issue
1
fYear
1989
fDate
2/1/1989 12:00:00 AM
Firstpage
484
Lastpage
492
Abstract
The MOSIS prototype fabrication system is discussed. Completed circuit layouts are transmitted to MOSIS over computer networks or via magnetic tape. MOSIS compiles multiproject wafers each week and supervises their fabrication. Three example CMOS designs are presented in varying detail. The first is a simple full-custom digital circuit (Swiftcache) the second is a semicustom digital circuit (Sparsecache), designed using a silicon compiler, and the third is a small, full-custom analog circuit
Keywords
CMOS integrated circuits; VLSI; application specific integrated circuits; circuit CAD; circuit layout CAD; nuclear electronics; MOS VLSI design; MOSIS prototype fabrication system; Sparsecache; Swiftcache; analog circuit; computer networks; full-custom digital circuit; magnetic tape; multiproject wafers; semicustom digital circuit; silicon compiler; Application specific integrated circuits; CMOS logic circuits; CMOS technology; Circuit simulation; Computational modeling; Design methodology; Digital circuits; Resistors; SPICE; Very large scale integration;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/23.34487
Filename
34487
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