Electric input admittance of an interdigital transducer in a layered, anisotropic, semiconducting structure

A theoretical analysis of the electric input admittance of an interdigital transducer in a layered, anisotropic, semiconducting structure is presented. A Fourier-integral formalism is employed that enables usto express the electric charge distribution on the electrodes in terms of the applied voltages. The relation between the currents fed into the electrodes and the applied voltages leads to the input admittance. Numerical results are presented for the complex input admittance of a uniform interdigital transducer consisting of 14 electrodes in a CdS/SiO₂/Si-configuration on a ground plane. The layer-thicknesses and conductivities of the various layers as well as the frequency of operation occur as parameters.