An efficient FPGA-based hardware framework for natural feature extraction and related Computer Vision tasks

The paper presents an efficient and flexible framework for extensive image processing tasks. While most available frameworks concentrate on pixel-based modules and interfaces for image preprocessing tasks, our proposal also covers the seamless integration of higher-level algorithms. Window-oriented filter operations, such as noise filters, edge filters or natural feature detectors, are performed within an efficient 2D window pipeline. This structure is generated and optimized automatically based on a user-defined filter configuration. For complex, higher-level algorithms, an optimized array of independent, software-based processing units is generated. As an example application, we chose object recognition based on the well-known SURF algorithm (“Speeded Up Robust Features”), which performs natural feature detection and description. All involved image processing steps were successfully mapped to our architecture. Thus, exploiting the FPGAs full potential regarding parallelism, we synthesized one of the most efficient SURF detectors and a complete object recognition system in a single mid-size FPGA.