An improved standard total dose test for CMOS space electronics

Author

Fleetwood, D.M. ; Winokur, P.S. ; Riewe, L.C. ; Pease, R.L.

Author_Institution

Sandia Nat. Lab., Albuquerque, NM, USA

Volume

36

Issue

6

fYear

1989

fDate

12/1/1989 12:00:00 AM

Firstpage

1963

Lastpage

1970

Abstract

The postirradiation response of hardened and commercial CMOS devices is investigated as a function of total dose, dose rate, and annealing time and temperature. Cobalt-60 irradiation at ≃200 rad(SiO₂)/s followed by a one-week 100°C biased anneal and testing is shown to be an effective screen of hardened devices for space use. However, a similar screen and single-point test performed after Co-60 irradiation and elevated-temperature anneal cannot be generally defined for commercial devices. In the absence of detailed knowledge about device and circuit radiation response, a two-point standard test is proposed to ensure space survivability of CMOS circuits; a Co-60 irradiation and test to screen against oxide-trapped-charge-related failures, and an additional rebound test to screen against interface-trap-related failures. Testing implications for bipolar technologies are also discussed

Keywords

CMOS integrated circuits; X-ray effects; annealing; gamma-ray effects; integrated circuit testing; ⁶⁰Co irradiation; CMOS space electronics; X-ray irradiation; annealing time; bipolar technologies; circuit radiation response; commercial CMOS devices; gamma-ray irradiation; interface-trap-related failures; oxide-trapped-charge-related failures; postirradiation response; space survivability; standard total dose test; two-point standard test; CMOS technology; Circuit testing; Dosimetry; Electronic equipment testing; Performance evaluation; Simulated annealing; Space technology; System testing; Temperature; Threshold voltage;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.45393

Filename

45393