Implementation of a digital read/write channel with EEPR4 detection

Author

Welland, D. ; Phillip, S. ; Tuttle, T. ; Ka Leung ; Dupuie, S. ; Holberg, D. ; Jack, R. ; Sooch, N. ; Behrens, R. ; Anderson, K. ; Armstrong, A. ; Bliss, W. ; Dudley, T. ; Foland, B. ; Glover, N. ; King, L.

Author_Institution

Crystal Semicond. Corp., Austin, TX, USA

Volume

31

Issue

2

fYear

1995

fDate

3/1/1995 12:00:00 AM

Firstpage

1180

Lastpage

1185

Abstract

A fully integrated digital read/write channel for magnetic recording applications is described. The device employs partial response maximum likelihood (PRML) sequence detection when reading data to enhance bit error rate vs. signal-to-noise ratio performance. The sequence detector is designed to accept input pulses exhibiting four non-zero samples, sampling occurring once per channel bit time. Channel optimization is facilitated through the inclusion of sixty-two 8-bit registers. The device is fabricated in a 0.8 micron double-metal CMOS process and supports data rates as high as 64 Mbits/sec.<>

Keywords

CMOS digital integrated circuits; digital magnetic recording; digital readout; magnetic recording noise; maximum likelihood detection; partial response channels; 0.8 micron; 64 Mbit/s; 8 bit; EEPR4 detection; bit error rate; channel optimization; digital read/write channel; double-metal CMOS process; magnetic recording; partial response maximum likelihood sequence detection; pulses; registers; sampling; signal-to-noise ratio; Circuit synthesis; Clocks; Delay lines; Gain control; Low pass filters; Poles and zeros; Prototypes; Pulse measurements; Switches; Writing;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/20.364804

Filename

364804