DocumentCode
1249858
Title
Wired-OR property and improved structure of recovered energy logic (REL)
Author
Chulwoo Kim ; Soowon Kim
Author_Institution
Dept. of Electron. Eng., Korea Univ., Seoul
Volume
33
Issue
9
fYear
1997
fDate
4/24/1997 12:00:00 AM
Firstpage
760
Lastpage
762
Abstract
A modified MOS REL structure is proposed, which exhibits the wired-OR property and enhances speed and power characteristics. Proposed MOS REL gates have been fabricated and tested. It is shown that the power X delay product of an MOS REL inverter is enhanced by 26% with a smaller silicon area
Keywords
MOS logic circuits; adders; logic design; logic gates; MOS REL gates; REL inverter; modified MOS REL structure; power characteristics enhancement; recovered energy logic; speed characteristics enhancement; wired-OR property;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19970500
Filename
590217
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