• DocumentCode
    1253457
  • Title

    Chippe: a system for constraint driven behavioral synthesis

  • Author

    Brewer, Forrest ; Gajski, Daniel

  • Author_Institution
    Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
  • Volume
    9
  • Issue
    7
  • fYear
    1990
  • fDate
    7/1/1990 12:00:00 AM
  • Firstpage
    681
  • Lastpage
    695
  • Abstract
    The Chippe system for constrained behavioural architecture synthesis uses a novel closed-loop design iteration technique in which the present state of the design is analyzed with respect to the goals and then modified for the next iteration. In this way the design state is iteratively driven towards meeting the global constraints imposed by the designer. The design synthesis is performed by a set of algorithmic tools specially constructed to permit the imposition of a wide variety of local constraints, and by a rule-based system which makes design analysis and modification decisions to set these local constraints. Key to these decisions is a design evaluator which examines the present state of the design and interactively reports its findings to the rule-based system. The closed-loop iteration strategy, the interaction between the rule base and the tools, and the evaluation performed to support the design decisions are detailed. Also presented are results from sample designs, including designs for the TMS320 digital signal processor chip
  • Keywords
    circuit CAD; expert systems; logic CAD; Chippe system; TMS320 digital signal processor chip; algorithmic tools; closed-loop design iteration; constraint driven behavioral synthesis; design evaluator; global constraints; rule-based system; sample designs; Algorithm design and analysis; Condition monitoring; Control system synthesis; Design engineering; Iterative algorithms; Knowledge based systems; Performance evaluation; Process design; Signal design; Time factors;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.55208
  • Filename
    55208