Two-Stage Degradation of p-Channel Poly-Si Thin-Film Transistors Under Dynamic Negative Bias Temperature Stress

Degradation of p-channel poly-Si thin-film transistors under dynamic negative bias temperature (NBT) stress has been studied. A two-stage degradation behavior is observed under the dynamic NBT stress. Device threshold voltage (V_th) shifts toward positive values in the first stage to more negative values in the second stage. The capacitance-voltage characteristic indicates a negative-charge generation in the gate oxide during the dynamic NBT stress, which is responsible for the positive V_th shift, while the well-known dc NBT instability effect causes the negative V_th shift. The dynamic effect is more significant under dynamic NBT stress with shorter pulse falling time and/or higher pulse amplitude. A degradation mechanism is proposed to explain the negative-charge generation under the dynamic NBT stress.