• DocumentCode
    1261346
  • Title

    RF characterisation of fully depleted SOI MOSFET with Si substrate removed

  • Author

    Chen, C.L. ; Burns, J.A. ; Warner, K. ; Beard, W.T.

  • Author_Institution
    Lincoln Lab., MIT, Lexington, MA, USA
  • Volume
    38
  • Issue
    5
  • fYear
    2002
  • fDate
    2/28/2002 12:00:00 AM
  • Firstpage
    256
  • Lastpage
    257
  • Abstract
    Silicon-on-insulator MOSFETs with Si substrate completely removed were characterised. The removal of the substrate, resulting in 4.8 μm wafer thickness, significantly reduced parasitic capacitance while retaining the device RF performance. This experiment demonstrates that RF circuits can be incorporated in a new three-dimensional integration technology
  • Keywords
    MOS integrated circuits; MOSFET; UHF integrated circuits; capacitance; field effect MMIC; high-speed integrated circuits; silicon-on-insulator; 4.8 micron; RF characterisation; Si; fully depleted SOI MOSFET; high-speed performance; parasitic capacitance; three-dimensional integration technology; wafer thickness;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20020167
  • Filename
    990230
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1261346