DocumentCode
1261645
Title
Design and Scalability of a Memory Array Utilizing Anchor-Free Nanoelectromechanical Nonvolatile Memory Device
Author
Vaddi, Ramesh ; Pott, Vincent ; Chua, Geng Li ; Lin, Julius Tsai Ming ; Kim, Tony T.
Author_Institution
Div. of Circuits & Syst., Nanyang Technol. Univ., Singapore, Singapore
Volume
33
Issue
9
fYear
2012
Firstpage
1315
Lastpage
1317
Abstract
This letter explains a nanoelectromechanical (NEM) nonvolatile memory (NVM) architecture employing an anchor-free electrode (shuttle) structure. The proposed NEM device utilizes adhesion forces to achieve bistable mechanical states for nonvolatile data storage. The anchor-free electrode facilitates better scalability compared to conventional anchored NEM devices, which is desirable for circuit applications. The structure is electrostatically actuated and has low operating voltage. A novel memory cell consisting of the proposed NEM memory device and two MOS transistors (1NEM-2T) is proposed for array implementation. The scalability analysis of the proposed NEM NVM array is also presented.
Keywords
MOSFET; electrodes; nanoelectromechanical devices; random-access storage; MOS transistor; adhesion force utilization; anchor-free NEM NVM architecture; anchor-free electrode structure; anchor-free nanoelectromechanical nonvolatile memory device; bistable mechanical state; electrostatically actuated structure; memory array utilization; memory cell; nonvolatile data storage; scalability analysis; Adhesives; Arrays; Electrodes; Microprocessors; Nonvolatile memory; Scalability; Hybrid NEMS–CMOS nonvolatile memory (NVM); NVM; Verilog-A; nanoelectromechanical (NEM) devices; scalability;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2012.2206364
Filename
6264088
Link To Document