• DocumentCode
    1272482
  • Title

    Novel hazard-free majority voter for n-modular redundancy-based fault tolerance in asynchronous circuits

  • Author

    Almukhaizim, S. ; Sinanoglu, Ozgur

  • Author_Institution
    Comput. Eng. Dept., Kuwait Univ., Safat, Kuwait
  • Volume
    5
  • Issue
    4
  • fYear
    2011
  • fDate
    7/1/2011 12:00:00 AM
  • Firstpage
    306
  • Lastpage
    315
  • Abstract
    N-modular redundancy (NMR) is the simplest and most effective fault-tolerant design method for integrated circuits, where N copies of a circuit are employed and a majority voter produces the voted output. Asynchronous circuits, however, exhibit various characteristics that limit the applicability of NMR. Specifically, the hazard-free property of the output in these circuits must be preserved when hardware providing fault tolerance, such as a majority voter, is added. In this work, we first demonstrate that a typical majority voter design would fail to preserve the hazard-free property of its response. We then propose a hazard-free majority voter design for the triple-modular redundancy fault-tolerance design paradigm, which enters an output-holding state to preserve the output value when transient errors may be sensitised to its inputs. By exploring various conditions to exit from the output-holding state, we describe several extensions of the voter into an NMR one, each yielding a distinct implementation with different tolerance characteristics and area cost. We generalise this extension based on the exit condition and analyse the associated tolerance capability of the extended NMR voter. Finally, the proposed hazard-free voter is simulated using HSPICE, and detailed area cost formulations are derived for the proposed voter designs.
  • Keywords
    SPICE; asynchronous circuits; fault tolerance; integrated circuit design; integrated circuit reliability; logic design; redundancy; HSPICE; N-modular redundancy-based fault tolerance; NMR voter; asynchronous circuit; exit condition; hazard-free majority voter design; hazard-free property; integrated circuit; output-holding state; transient error; triple-modular redundancy fault-tolerance design;
  • fLanguage
    English
  • Journal_Title
    Computers & Digital Techniques, IET
  • Publisher
    iet
  • ISSN
    1751-8601
  • Type

    jour

  • DOI
    10.1049/iet-cdt.2009.0075
  • Filename
    5953950