A 10-bit 80 MHz 3.0 V CMOS D/A converter for video applications

Author

Song, Moonsik ; Kang, Bongsoon ; Joe, Eurho

Author_Institution

Syst. LSI Bus., Samsung Electron., South Korea

Volume

43

Issue

3

fYear

1997

fDate

8/1/1997 12:00:00 AM

Firstpage

868

Lastpage

872

Abstract

A low-voltage, high-speed, and high-resolution CMOS D/A converter is implemented using an improved unique switching sequence to reduce integral linearity error (ILE) in the output of current cells, and a novel segmented layout technique to minimize both current asymmetry due to drain current directions and voltage drop due to power line resistance. The D/A converter has been fabricated by using 0.65 μm CMOS process. The differential linearity error (DLE) is 0.37 LSB and the ILE is 0.87 LSB. It occupies a die area of 700×800 μm² and operates up to 80 MHz with 3.O V

Keywords

CMOS digital integrated circuits; analogue-digital conversion; image resolution; television equipment; video signal processing; 0.65 micron; 10 bit; 3 V; 48 mW; 80 MHz; CMOS process; LSB; current asymmetry; current cells output; die area; differential linearity error; drain current directions; high-resolution CMOS D/A converter; high-speed DAC; integral linearity error reduction; low-voltage DAC; power line resistance; segmented layout technique; switching sequence; video applications; voltage drop; CMOS process; Latches; Linearity; Matrix converters; Mirrors; Signal processing; Signal resolution; Switches; Switching converters; Voltage;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.628746

Filename

628746