• DocumentCode
    1274124
  • Title

    Improving Safe Operating Area of nLDMOS Array With Embedded Silicon Controlled Rectifier for ESD Protection in a 24-V BCD Process

  • Author

    Chen, Wen-Yi ; Ker, Ming-Dou

  • Author_Institution
    Nanoelectron. & Gigascale Syst. Lab., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
  • Volume
    58
  • Issue
    9
  • fYear
    2011
  • Firstpage
    2944
  • Lastpage
    2951
  • Abstract
    In high-voltage technologies, silicon-controlled rectifier (SCR) is usually embedded in output arrays to provide a robust and self-protected capability against electrostatic discharge (ESD). Although the embedded SCR has been proven as an excellent approach to increasing ESD robustness, mistriggering of the embedded SCR during normal circuit operating conditions can bring other application reliability concerns. In particular, the safe operating area (SOA) of output arrays due to SCR insertion has been seldom evaluated. In this paper, the impact of embedding SCR to the electrical SOA (eSOA) of an n-channel LDMOS (nLDMOS) array has been investigated in a 24-V bipolar CMOS-DMOS process. Experimental results showed that the nLDMOS array suffers substantial degradation on eSOA due to embedded SCR. Design approaches, including a new proposed poly-bending (PB) layout, were proposed and verified in this paper to widen the eSOA of the nLDMOS array with embedded SCR. Both the high ESD robustness and the improved SOA of circuit operation can be achieved by the new proposed PB layout in the nLDMOS array.
  • Keywords
    BIMOS integrated circuits; CMOS integrated circuits; electrostatic discharge; rectifiers; silicon; BCD process; ESD protection; SCR; bipolar CMOS-DMOS process; eSOA; electrical SOA; electrostatic discharge; embedded silicon controlled rectifier; high-voltage technology; n-channel LDMOS; nLDMOS array; poly-bending layout; safe operating area; voltage 24 V; Arrays; Current measurement; Electrostatic discharge; Logic gates; Semiconductor optical amplifiers; Thyristors; Voltage measurement; Electrostatic discharge (ESD); poly-bending (PB) layout; reliability; safe operating area (SOA); silicon-controlled rectifier (SCR);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2159861
  • Filename
    5955110