• DocumentCode
    1274606
  • Title

    Low-Power-Consumption Wide-Locking-Range Dual-Injection-Locked 1/2 Divider Through Simultaneous Optimization of VCO Loaded Q and Current

  • Author

    Lee, Sanghun ; Jang, Sunhwan ; Nguyen, Cam

  • Author_Institution
    Samsung Electron. Co., Ltd., Yongin, South Korea
  • Volume
    60
  • Issue
    10
  • fYear
    2012
  • Firstpage
    3161
  • Lastpage
    3168
  • Abstract
    A new 1/2 dual-injection-locked frequency divider (dual-ILFD) with wide locking range and low-power consumption is proposed, analyzed, and developed together with a divide-by-2 current-mode logic (CML) divider. The chip was fabricated using a 0.18-μm BiCMOS process. The 1/2 dual-ILFD enhances the locking range with low-power consumption through optimized load quality factor (QL) and output current amplitude (iOSC) simultaneously. The relationship between iOSC and QL, and hence the locking range, is explained analytically. The designed 1/2 dual-ILFD also works as a free-running oscillator between 3.592 and 4.102 GHz without injection signals. The 1/2 dual-ILFD achieves a locking range of 692 MHz between 7.512 and 8.204 GHz. The current consumption of the designed core 1/2 dual-ILFD is 2.93 mA with 1.5-V supply. The designed 1/2 dual-ILFD increases the locking range by 9.9 times over a single-injection counterpart. The new 1/2 dual-ILFD is especially attractive for microwave phase-locked loops and frequency synthesizers requiring low power and wide locking range.
  • Keywords
    BiCMOS integrated circuits; Q-factor; circuit optimisation; current-mode logic; frequency dividers; frequency synthesizers; injection locked oscillators; low-power electronics; phase locked loops; voltage-controlled oscillators; 1/2 dual-ILFD; 1/2 dual-injection-locked frequency divider; BiCMOS process; CML divider; QL; VCO; chip fabrication; current 2.93 mA; current consumption; divide-by-2 current-mode logic divider; free-running oscillator; frequency 3.592 GHz to 4.102 GHz; frequency 692 MHz; frequency 7.512 GHz to 8.204 GHz; frequency synthesizer; iOSC; low-power consumption; microwave phase-locked loop; optimization; optimized load quality factor; output current amplitude; size 0.18 mum; voltage 1.5 V; wide locking range; Frequency conversion; Frequency synthesizers; Impedance matching; Phase locked loops; Q factor; Voltage-controlled oscillators; Complementary voltage-controlled oscillator (VCO); even-divider; injection-locked frequency divider (ILFD); injection-locked oscillator; phase-locked loop (PLL); synthesizer;
  • fLanguage
    English
  • Journal_Title
    Microwave Theory and Techniques, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9480
  • Type

    jour

  • DOI
    10.1109/TMTT.2012.2209451
  • Filename
    6287612