• DocumentCode
    1282309
  • Title

    A Two-Stage Degradation Model of p-Channel Low-Temperature Poly-Si Thin-Film Transistors Under Positive Bias Temperature Stress

  • Author

    XiaoWei Lu ; Mingxiang Wang ; Man Wong

  • Author_Institution
    Dept. of Microelectron., Soochow Univ., Suzhou, China
  • Volume
    58
  • Issue
    10
  • fYear
    2011
  • Firstpage
    3501
  • Lastpage
    3505
  • Abstract
    Positive-bias temperature-stress-induced degradation in p-channel poly-Si thin-film transistors is investigated. Two-stage degradation behavior is observed. In the first-stage degradation, on-state current (ION) initially increases associated with a positive threshold voltage (Vth) shift and is then followed by a gradual ION decrease. In the second stage, Vth shifts to the negative, and ION significantly degrades. A comprehensive physical model is proposed to clarify the two-stage degradation behavior. The first-stage degradation is attributed to electron trapping and detrapping, whereas the second-stage degradation is dominated by positive charge generation.
  • Keywords
    elemental semiconductors; silicon; thin film transistors; Si; comprehensive physical model; electron detrapping; electron trapping; on-state current; p-channel low-temperature poly-Si thin-film transistor; positive charge generation; positive threshold voltage shift; positive-bias temperature-stress-induced degradation; two-stage degradation model; Charge carrier processes; Degradation; Logic gates; Silicon; Stress; Thin film transistors; Degradation; negative-bias temperature instability (NBTI) positive-bias temperature stress; poly-Si; thin-film transistors (TFTs);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2160949
  • Filename
    5961619