The Zero-Temperature-Coefficient Point Modeling of DTMOS in CMOS Integration

Author

Wang, Kuan-Ti ; Lin, Wan-Chyi ; Chao, Tien-Sheng

Author_Institution

Dept. of Electrophys., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

31

Issue

10

fYear

2010

Firstpage

1071

Lastpage

1073

Abstract

For the first time, analytical expressions of zero-temperature-coefficient (ZTC) point modeling of DTMOS transistor are successfully presented in detail. New analytical formulations for the linear and saturation regions of DTMOS transistor operation that make certain the drive current to be temperature independent for the ideal gate voltage are developed. The maximum errors of 0.87% and 2.35% in the linear and saturation regions, respectively, confirm a good agreement between our DTMOS ZTC point model and the experimental data. Compared to conventional MOSFET, the lower V_g (ZTC) with higher overdrive current of DTMOS improves the integrated circuit speed and efficiency for the low-power-consumption concept in green CMOS technology.

Keywords

CMOS integrated circuits; MOSFET; low-power electronics; CMOS integration; DTMOS transistor; MOSFET; ZTC point modeling; gate voltage; green CMOS technology; integrated circuit speed; linear region; low-power-consumption; saturation region; zero-temperature-coefficient point modeling; CMOS integrated circuits; CMOS technology; Chaos; Data models; High speed integrated circuits; Integrated circuit modeling; Integrated circuit technology; Intrusion detection; Logic gates; MOSFET circuits; Semiconductor device modeling; Temperature; Temperature dependence; Temperature distribution; Threshold voltage; Transistors; Voltage; DTMOS; modeling; strain; zero temperature coefficient (ZTC);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2010.2057404

Filename

5540257