DocumentCode
1286380
Title
Low-Power Snoop Architecture for Synchronized Producer-Consumer Embedded Multiprocessing
Author
Yu, Chenjie ; Petrov, Peter
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
Volume
17
Issue
9
fYear
2009
Firstpage
1362
Lastpage
1366
Abstract
We introduce a cross-layer customization methodology where application knowledge regarding data sharing in producer-consumer relationships is used in order to aggressively eliminate unnecessary and predictable snoop-induced cache lookups even for references to shared data, thus, achieving significant power reductions with minimal hardware cost. The technique exploits application-specific information regarding the exact producer-consumer relationships between tasks as well as information regarding the precise timing of synchronized accesses to shared memory buffers by their corresponding producers and/or consumers. Snoop-induced cache lookups for accesses to the shared data are eliminated when it is ensured that such lookups will not result in extra knowledge regarding the cache state in respect to the other caches and the memory. Our experiments show average power reductions of more than 80% compared to a general-purpose snoop protocol.
Keywords
cache storage; embedded systems; logic design; microprocessor chips; multiprocessing systems; network synthesis; system-on-chip; cross layer customization methodology; data sharing knowledge; low power snoop architecture; minimal hardware cost; power reductions; predictable snoop induced cache lookups; synchronized producer consumer embedded multiprocessing; systems-on-chip; Low-power cache coherence; low-power multiprocessor systems-on-a-chip (MPSoC); producer-consumer communication in MPSoC;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2009.2019414
Filename
5191029
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