• DocumentCode
    1287255
  • Title

    Impact of nitrogen (N/sub 14/) implantation into polysilicon gate on high-performance dual-gate CMOS transistors

  • Author

    Bin Yu ; Dong-Hyuk Ju ; Kepler, N. ; Chenming Hu

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • Volume
    18
  • Issue
    7
  • fYear
    1997
  • fDate
    7/1/1997 12:00:00 AM
  • Firstpage
    312
  • Lastpage
    314
  • Abstract
    The effect of nitrogen (N/sub 14/)implant into dual-doped polysilicon gates was investigated. The electrical characteristics of sub-0.25-μm dual-gate transistors (both p- and n-channel), MOS capacitor quasi-static C-V curve, SIMS profile, poly-Si gate R/sub s/, and oxide Q/sub bd/ were compared at different nitrogen dose levels. A nitrogen dose of 5×10/sup 15/ cm/sup -2/ is the optimum choice at an implant energy of 40 KeV in terms of the overall performance of both p- and n-MOSFETs and the oxide Q/sub bd/. The suppression of boron penetration is confirmed by the SIMS profiles to be attributed to the retardation effect in bulk polysilicon with the presence of nitrogen. High nitrogen dose (1×10/sup 16/ cm/sup -2/) results in poly depletion and increase of sheet resistance in both unsilicided and silicided p/sup +/ poly, degrading the transistor performance. Under optimum design, nitrogen implantation into poly-Si gate is effective in suppressing boron penetration without degrading performance of either p- or n-channel transistors.
  • Keywords
    CMOS integrated circuits; MOS capacitors; MOSFET; characteristics measurement; ion implantation; rapid thermal annealing; secondary ion mass spectra; 0.25 mum; 40 keV; B penetration suppression; CMOS IC scaling; MOS capacitor quasi-static C-V curve; N dose level dependence; N/sub 14/ implantation; RTA; SIMS profile; Si:N; dual-gate CMOS transistors; electrical characteristics; implant energy; n-channel transistors; nMOSFET; oxide charge to breakdown; p-channel transistors; pMOSFET; poly-Si gate sheet resistance; polysilicon gate; retardation effect; Annealing; Boron; CMOS integrated circuits; Degradation; Electric variables; Implants; MOS capacitors; MOSFET circuits; Nitrogen; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.596922
  • Filename
    596922