• DocumentCode
    128963
  • Title

    Cell-centered finite volume schemes for semiconductor device simulation

  • Author

    Rupp, Karl ; Bina, Markus ; Wimmer, Yannick ; Jungel, Ansgar ; Crasser, Tibor

  • Author_Institution
    Inst. for Microelectron., Tech. Univ. Wien, Vienna, Austria
  • fYear
    2014
  • fDate
    9-11 Sept. 2014
  • Firstpage
    365
  • Lastpage
    368
  • Abstract
    Although the traditional finite volume scheme based on boxes obtained from the dual Voronoi grid has been employed successfully for classical semiconductor device simulation for decades, certain drawbacks such as the required Delaunay property of the underlying mesh limit its applicability for two-and particularly three-dimensional device simulations on unstructured meshes. We propose a discretization based on mesh cells rather than dual boxes around vertices, which circumvents the Delaunay requirement, yet preserves all the important features of the traditional method such as exact current conservation. The applicability of our method is demonstrated for classical and semiclassical models to tackle current engineering problems: We consider three-dimensional drift-diffusion simulations of geometric variations of the fin in a FinFET and present results from spatially two-dimensional simulations of a high-voltage nLDMOS device based on spherical harmonics expansions for direct solutions of the Boltzmann transport equation.
  • Keywords
    Boltzmann equation; MOSFET; computational geometry; finite volume methods; mesh generation; Boltzmann transport equation; Delaunay property; FinFET; cell-centered finite volume schemes; classical models; discretization; dual Voronoi grid; geometric variations; high-voltage nLDMOS device; mesh cells; semiclassical models; semiconductor device simulation; spherical harmonics expansions; three-dimensional device simulations; three-dimensional drift-diffusion simulations; two-dimensional device simulations; unstructured meshes; Boltzmann equation; Distribution functions; Harmonic analysis; Logic gates; Materials; Mathematical model; Solid modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices (SISPAD), 2014 International Conference on
  • Conference_Location
    Yokohama
  • ISSN
    1946-1569
  • Print_ISBN
    978-1-4799-5287-8
  • Type

    conf

  • DOI
    10.1109/SISPAD.2014.6931639
  • Filename
    6931639