DocumentCode
1293417
Title
A fault diagnosis algorithm for asymmetric modular architectures
Author
Meyer, Gerard G. L.
Author_Institution
Dept. of Electrical Engng., Johns Hopkins Univ., Baltimore, MD, USA
Issue
1
fYear
1981
Firstpage
81
Lastpage
83
Abstract
Pertains to the analysis of an algorithm for the automatic fault diagnosis of asymmetric modular networks.
Keywords
fault location; logic testing; asymmetric modular architectures; asymmetric modular networks; fault diagnosis algorithm; Algorithm design and analysis; Circuit faults; Computer architecture; Fault diagnosis; Logic gates; Partitioning algorithms; Testing; Connection assignment; diagnosis algorithm; modular architecture; permanent fault; syndrome;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1981.6312161
Filename
6312161
Link To Document