A 3 mW 54.6 GHz Divide-by-3 Injection Locked Frequency Divider With Resistive Harmonic Enhancement

Author

Xiao Peng Yu ; van Roermund, A. ; Xiao Lang Yan ; Cheema, H.M. ; Mahmoudi, R.

Author_Institution

Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China

Volume

19

Issue

9

fYear

2009

Firstpage

575

Lastpage

577

Abstract

A 54.6 GHz divide-by-3 injection locked frequency divider with low power consumption is presented. A resistive feedback is implemented to achieve a stable dc input and higher injection efficiency. Compared with the conventional design, it exhibits a better supply voltage rejection and wider locking range while a small silicon area is maintained. Fabricated in a TSMC 65 nm bulk CMOS process, this divider operates from 48.8 to 54.6 GHz and consumes 3 mW from a 0.9 V supply.

Keywords

CMOS integrated circuits; frequency dividers; bulk CMOS process; dc input stability; divide-by-3 injection locked frequency divider; frequency 48.8 GHz to 54.6 GHz; low power consumption; power 3 mW; resistive feedback; resistive harmonic enhancement; size 65 nm; voltage 0.9 V; Degradation; Energy consumption; Feedback; Frequency conversion; Frequency synthesizers; Mixers; Power system harmonics; Q factor; Silicon; Voltage; Frequency divider (FD); frequency synthesizer; injection locked frequency divider (ILFD); prescaler;

fLanguage

English

Journal_Title

Microwave and Wireless Components Letters, IEEE

Publisher

ieee

ISSN

1531-1309

Type

jour

DOI

10.1109/LMWC.2009.2027089

Filename

5200429