Non-TMR SEU-Hardening Techniques for SiGe HBT Shift Registers and Clock Buffers

Author

Wilcox, Edward P. ; Phillips, Stanley D. ; Cressler, John D. ; Marshall, Paul W. ; Carts, Martin A. ; Pellish, Jonathan A. ; Richmond, Larry ; Mathes, William ; Randall, Barbara ; Post, Devon ; Gilbert, Barry ; Daniel, Erik

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

57

Issue

4

fYear

2010

Firstpage

2119

Lastpage

2123

Abstract

We report new results from both broad-beam, heavy-ion and proton experiments for circuit-level RHBD techniques in SiGe digital logic. Redundant circuit elements within the latches are used to significantly reduce single-event upset rates in shift registers and clock paths, without resorting to TMR techniques.

Keywords

BiCMOS logic circuits; Ge-Si alloys; current-mode logic; radiation hardening (electronics); shift registers; SiGe HBT shift registers; SiGe digital logic; circuit-level RHBD techniques; clock buffers; heavy-ion experiment; nonTMR SEU-hardening techniques; proton experiment; redundant circuit elements; silicon-germanium BiCMOS technology; single-event upset rates; Circuit testing; Clocks; Germanium silicon alloys; Heterojunction bipolar transistors; Millimeter wave technology; Protons; Radiation hardening; Shift registers; Silicon germanium; Single event upset; Space technology; Testing; Bit-error rate testing; gated feedback cell (GFC); radiation hardening by design (RHBD); silicon-germanium (SiGe); single event upset (SEU);

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2010.2051681

Filename

5550386