• DocumentCode
    1298964
  • Title

    Multilevel selective harmonic elimination PWM technique in series-connected voltage inverters

  • Author

    Li, Li ; Czarkowski, Dariusz ; Liu, Yaguang ; Pillay, Pragasen

  • Author_Institution
    Dept. of Electr. Eng., Polytech. Univ., Brooklyn, NY, USA
  • Volume
    36
  • Issue
    1
  • fYear
    2000
  • Firstpage
    160
  • Lastpage
    170
  • Abstract
    Selective harmonic elimination pulsewidth modulation (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage-source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for double-cell (five-level) inverters. Theoretical results of both methods are verified by experiments and simulations for a double-cell inverter. Simulation results for a five-cell (11-level) inverter are also presented for the multilevel SHEPWM method
  • Keywords
    PWM invertors; harmonics suppression; power conversion harmonics; double-cell inverters; five-level inverters; mirror surplus harmonic method; multilevel selective harmonic elimination PWM; multilevel series-connected voltage-source PWM inverters; optimization techniques; phase-shift harmonic suppression; series-connected voltage inverters; Computational modeling; Harmonics suppression; Industry Applications Society; Mirrors; Power semiconductor switches; Pulse inverters; Pulse modulation; Pulse width modulation inverters; Space vector pulse width modulation; Voltage;
  • fLanguage
    English
  • Journal_Title
    Industry Applications, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0093-9994
  • Type

    jour

  • DOI
    10.1109/28.821811
  • Filename
    821811