DocumentCode
1300070
Title
Equivalent Elmore delay for RLC trees
Author
Ismail, Yehea I. ; Friedman, Eby G. ; Neves, José L.
Author_Institution
Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA
Volume
19
Issue
1
fYear
2000
fDate
1/1/2000 12:00:00 AM
Firstpage
83
Lastpage
97
Abstract
Closed-form solutions for the 50% delay, rise time, overshoots, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy characteristics of the Elmore delay for RC trees and preserves the simplicity and recursive characteristics of the Elmore delay. Specifically, the complexity of calculating the time domain responses at all the nodes of an RLC tree is linearly proportional to the number of branches in the tree and the solutions are always stable. The closed-form expressions introduced here consider all damping conditions of an RLC circuit including the underdamped response, which is not considered by the Elmore delay due to the nonmonotone nature of the response. The continuous analytical nature of the solutions makes these expressions suitable for design methodologies and optimization techniques. Also, the solutions have significantly improved accuracy as compared to the Elmore delay for an overdamped response. The solutions introduced here for RLC trees can be practically used for the same purposes that the Elmore delay is used for RC trees
Keywords
VLSI; delays; integrated circuit interconnections; integrated circuit modelling; trees (mathematics); Elmore delay model; RLC tree; VLSI interconnect; damping; design optimization; overshoot; rise time; settling time; time domain response; Circuit simulation; Delay effects; Delay estimation; Design methodology; Design optimization; Inductance; Integrated circuit interconnections; RLC circuits; Very large scale integration; Wire;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.822622
Filename
822622
Link To Document