• DocumentCode
    1301642
  • Title

    How much logic should go in an FPGA logic block

  • Author

    Betz, Vaughn ; Rose, Jonathan

  • Author_Institution
    Toronto Univ., Ont., Canada
  • Volume
    15
  • Issue
    1
  • fYear
    1998
  • Firstpage
    10
  • Lastpage
    15
  • Abstract
    The logic blocks of most FPGAs contain clusters of lookup tables and flip-flops yet little is known about good choices for key parameters. How many lookup tables should a cluster contain, how should FPGA routing flexibility change as cluster size changes, and how many inputs should programmable routing provide each cluster?
  • Keywords
    circuit layout CAD; field programmable gate arrays; logic CAD; table lookup; FPGA routing; cluster size; flip-flops; logic blocks; lookup tables; programmable routing; Clocks; Combinational circuits; Field programmable gate arrays; Flip-flops; Integrated circuit interconnections; Logic design; Logic testing; Routing; Sequential circuits; Table lookup;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.655177
  • Filename
    655177
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1301642