DocumentCode
1303501
Title
Architecture for high-order multidimensional convolution using polynomial transforms
Author
Arambepola, B.
Author_Institution
Dept. of Electr. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Volume
26
Issue
12
fYear
1990
fDate
6/7/1990 12:00:00 AM
Firstpage
801
Lastpage
802
Abstract
An efficient hardware architecture is presented for computing convolutions and correlations with two or more dimensions. This is derived from combining a class of polynomial transforms with currently available VLSI convolution devices. The proposed method is particularly suitable for computing high order convolutions with little or no arithmetic quantisation errors.
Keywords
computerised signal processing; correlators; parallel architectures; polynomials; transforms; 2D data array; VLSI convolution devices; butterfly processor; correlations; hardware architecture; high-order multidimensional convolution; polynomial transforms; signal processor;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19900523
Filename
52090
Link To Document