• DocumentCode
    1303746
  • Title

    Hardware Coprocessor Synthesis from an ANSI C Specification

  • Author

    Ahuja, Sumit ; Gurumani, Swathi T. ; Spackman, Chad ; Shukla, Sandeep K.

  • Author_Institution
    ECE Dept., Virginia Polytech. & State Univ., Blacksburg, VA, USA
  • Volume
    26
  • Issue
    4
  • fYear
    2009
  • Firstpage
    58
  • Lastpage
    67
  • Abstract
    This article shows how design space exploration can be realized through high-level synthesis.It presents a case study of a hardware implementation of the advanced encryption standard (AES) Rijindael algorithm. Starting from algorithmic specification, it generate various architectures by using the C2R compiler.
  • Keywords
    ANSI standards; coprocessors; cryptography; program compilers; ANSI C specification; C2R compiler; advanced encryption standard Rijindael algorithm; algorithmic specification; design space exploration; hardware coprocessor synthesis; hardware implementation; high-level synthesis; Computer architecture; Concurrent computing; Coprocessors; Cryptography; Delay; Hardware design languages; High level synthesis; Moore´s Law; Software algorithms; Space exploration; ANSI C; ASIC; C2R methodology; ESL; FPGA; Verilog; design and test; high-level synthesis; power reduction; verification;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.81
  • Filename
    5209963
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1303746