A memory transaction model for Sparse Matrix-Vector multiplications on GPUs

The Sparse Matrix-Vector multiplication (SpMV) is an algorithm used in many fields. Since the introduction of CUDA and general purpose programming on GPUs, several efforts to optimize it have been reported. SpMV optimization is complex due to irregular memory accesses depending on the nonzero element distribution of the matrix. In this paper, we propose a model that predicts the number of memory transactions of SpMV for a matrix stored in the CSR format. With the number of memory transactions known in advance, the performance and the execution time can be estimated. The model can be used to select the best suited CUDA implementation for sparse matrices for a given application domain. Predicted results from the model are within 7.5% for the matrices of more than 1000 rows that we have tested on the NVIDIA Tesla K20c and Ge-Force GTX 670.