DocumentCode
131642
Title
Research on Packet-Processing Architecture Based on Multi-core Processor
Author
Wang Ying
Author_Institution
Liaoning Jianzhu Vocational Univ., Liaoyang, China
fYear
2014
fDate
10-11 Jan. 2014
Firstpage
520
Lastpage
523
Abstract
Based on modeling analysis of the cache-missing delay and the packet-processing overhead of multi-core processor, we analyze and compare the parallel architecture and the hybrid architecture of multi-core packet-processing system. Analysis results show that the hybrid architecture has several advantages over the parallel architecture. And if we allocate the resources appropriately in all stages of processing, the hybrid architecture can also deliver a better performance than the parallel architecture. The experiment results show that our analysis is in line with the actual situation.
Keywords
delays; multiprocessing systems; parallel architectures; cache-missing delay modeling analysis; multicore packet-processing system; multicore processor; parallel architecture; resource resources; Automation; Mechatronics; Cache; multi-core processor; overhead; packet-processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Measuring Technology and Mechatronics Automation (ICMTMA), 2014 Sixth International Conference on
Conference_Location
Zhangjiajie
Print_ISBN
978-1-4799-3434-8
Type
conf
DOI
10.1109/ICMTMA.2014.126
Filename
6802744
Link To Document