DocumentCode
1316661
Title
A new spin on the MOSFET
Author
Dyball, Helen
Author_Institution
IET, Stevenage, UK
Volume
47
Issue
18
fYear
2011
Firstpage
1007
Lastpage
1007
Abstract
Highly efficient power-gating systems beyond conventional CMOS technology could be realised using a new non-volatile flip-flop design based on a ´pseudo-spin-MOSFET´ (PSMOSFET), researchers in Japan have shown. The non-volatile flip-flop architecture is faster and uses less power than other backup architectures using ordinary flip-flops, and is compatible with existing CMOS fabrication and circuit technologies.
Keywords
CMOS logic circuits; MOSFET; flip-flops; low-power electronics; CMOS fabrication; CMOS logic system; nonvolatile flip-flop architecture; nonvolatile flip-flop design; power-gating system; pseudo-spin-MOSFET;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2011.2623
Filename
6012940
Link To Document