A VLSI fuzzy logic controller with reconfigurable, cascadable architecture

Author

Watanabe, Hiroyuki ; Dettloff, Wayne D. ; Yount, Kathy E.

Author_Institution

Dept. of Comput. Sci., North Carolina Univ., Chapel Hill, NC, USA

Volume

25

Issue

2

fYear

1990

fDate

4/1/1990 12:00:00 AM

Firstpage

376

Lastpage

382

Abstract

A general-purpose fuzzy logic inference engine for real-time control applications, designed and fabricated in a 1.1-μm, 3.3-V, double-level-metal CMOS technology, is discussed. Up to 102 rules are processed in parallel with a single 688 K transistor device. Features include a dynamically reconfigurable and cascadable architecture, TTL-compatible host interface, laser-programmable redundancy, a special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification

Keywords

CMOS integrated circuits; VLSI; fuzzy logic; inference mechanisms; microcontrollers; parallel processing; 1.1 micron; 3.3 V; CMOS technology; RAM rule storage; TTL-compatible host interface; VLSI fuzzy logic controller; cascadable architecture; defuzzification; double-level-metal; dynamically reconfigurable architecture; fuzzy logic inference engine; laser-programmable redundancy; mode for testability; on-chip fuzzification; real-time control; Automatic control; CMOS technology; Engines; Expert systems; Fuzzy logic; Fuzzy sets; Mathematical model; Process control; Testing; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.52159

Filename

52159