DocumentCode
1324129
Title
Subsets of Primary Input Vectors in Sequential Test Generation for Single Stuck-at Faults
Author
Pomeranz, Irith
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume
30
Issue
10
fYear
2011
Firstpage
1579
Lastpage
1583
Abstract
The complexity of deterministic sequential test generation for a target fault in a circuit with n primary inputs is determined by the need to explore a search space that consists of 2n primary input vectors at every time unit. This paper studies the possibility of reducing the complexity of deterministic sequential test generation by using subsets of primary input vectors of limited sizes during test generation for target faults. It considers a test generation procedure that uses subsets of primary input vectors of size N, for increasing values of N starting with N=1 . The subsets consist of primary input vectors from the test sequence already generated, and of random primary input vectors. The results indicate that all or most of the detectable single stuck-at faults in benchmark circuits can be detected using small subsets of primary input vectors.
Keywords
logic testing; sequential circuits; benchmark circuits; primary input vector subsets; search space; sequential circuit; sequential test generation; single stuck-at faults; target faults; test generation; test sequence; Benchmark testing; Circuit faults; Complexity theory; Integrated circuit modeling; Sequential circuits; Space exploration; Synchronization; Functional test sequences; sequential test generation; single stuck-at faults;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2011.2157158
Filename
6022014
Link To Document