• DocumentCode
    1329392
  • Title

    M-sequence based M-ary/SS scheme for high bit rate transmission in DS/CDMA systems

  • Author

    Ito, T. ; Sampei, S. ; Morinaga, N.

  • Author_Institution
    Dept. of Commun. Eng., Osaka Univ., Japan
  • Volume
    36
  • Issue
    6
  • fYear
    2000
  • fDate
    3/16/2000 12:00:00 AM
  • Firstpage
    574
  • Lastpage
    576
  • Abstract
    A high bit rate and high power efficiency transmission scheme is proposed which uses an M-sequence based M-ary-SS scheme for DS/CDMA systems combined with a block branch metric calculation for the Viterbi decoder and a signal to noise plus interference power ratio (SNIR) measurement scheme for transmitter power control (TPC). Computer simulation confirms that the proposed scheme leads to a much higher BER performance while maintaining a lower peak to average transmitter power ratio
  • Keywords
    Viterbi decoding; code division multiple access; multimedia communication; sequences; spread spectrum communication; DS/CDMA systems; M-sequence based M-ary/SS scheme; Viterbi decoder; block branch metric calculation; high bit rate transmission; peak to average transmitter power ratio; power efficiency; signal to noise plus interference power ratio; transmitter power control;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20000444
  • Filename
    840177
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1329392