• DocumentCode
    1331300
  • Title

    IDDQ testing of single floating gate defects using a two-pattern vector

  • Author

    Champac, V.H. ; Figueras, J.

  • Author_Institution
    INAOE, Puebla, Mexico
  • Volume
    32
  • Issue
    17
  • fYear
    1996
  • fDate
    8/15/1996 12:00:00 AM
  • Firstpage
    1572
  • Lastpage
    1574
  • Abstract
    Intermediate voltages may appear at the output of a gate in the presence of single floating gate defects. Propagation of the effect of the intermediate voltage to driven gate(s) allows detection of the defect by sensing the increase in IDDQ consumption downstream in the circuit. The mechanisms responsible for the intermediate voltages are modelled, and, experimental measurements on circuits fabricated with the defect are found to be consistent with the proposed model and analysis
  • Keywords
    integrated circuit testing; IDDQ testing; integrated circuit; intermediate voltage; single floating gate defect; two-pattern vector;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19961033
  • Filename
    533299