High-Power Dynamic Life Tests of Transistors

In an effort to correlate failure modes observed on field return transistor failures to life test results, Delco Radio initiated a new type power pulse life test program. The program was added to the normally accepted storage and dc operating programs which did not supply adequate information on burn-through or punch-through failures. The test matrix was designed around a unique three-dimensional dynamic failure rate graphical model. This paper describes the engineering and development of the high-power test equipment required to prove the model. A number of photographs and illustrations of the equipment developed have been included. The design of test circuits for maximum reliability for dynamic testing are also discussed. At the conclusion of the paper, the actual results of the program which are applicable to circuit designers are presented.