Magnetic Content Addressable Memory Design for Wide Array Structure

In this paper, we present a novel magnetic content addressable memory (MCAM) cell and array architecture. The proposed design has large readout margin to tolerate tunneling resistance variation among magnetic tunneling junctions in the array. All previous proposed MCAM designs have very limited readout margins. The low readout margin poses a challenge to bring MCAM into practical uses that often require wide array, i.e., each word contains 128 bits, 256 bits, or even more. The proposed MCAM readout scheme leverages the exponential relationship between MOSFETs´ subthreshold current and gate voltage to suppress small errors due to tunneling resistance variations. Numerical simulation demonstrates the capability of handling 512 bit wide array while allowing more than 30% tunneling resistance variations.