• DocumentCode
    133273
  • Title

    A solid state variable capacitor with minimum DC capacitance

  • Author

    Sisheng Liang ; Xi Lu ; Runruo Chen ; Yang Liu ; Shao Zhang ; Peng, Fang Zheng

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA
  • fYear
    2014
  • fDate
    16-20 March 2014
  • Firstpage
    3496
  • Lastpage
    3501
  • Abstract
    A new solid state variable capacitor (SSVC) with minimum dc capacitance is proposed. A variable ac capacitor (with capacitance variable from 0 to Cac) is traditionally implemented by an H-bridge inverter and a large electrolytic dc capacitor with capacitance of 20 times the ac capacitance value, Cac to absorb the 2ω dc ripple. The proposed SSVC consists of an H-bridge and an additional phase leg connected to an ac capacitor with fixed capacitance, Cac and can reduce the dc capacitance to the minimum just for absorbing switching ripples. The fixed ac capacitor controlled by the additional phase leg absorbs the 2ω component and theoretically can eliminate 2ω ripples to the dc capacitor completely. Therefore, no electrolytic capacitors would be needed. Theoretical analysis of the SSVC is provided. Simulation and experimental results are shown to prove the effectiveness of the proposed SSVC with minimum dc capacitance.
  • Keywords
    invertors; power capacitors; H-bridge inverter; electrolytic dc capacitor; fixed ac capacitor; minimum DC capacitance; solid state variable capacitor; variable ac capacitor; Capacitance; Capacitors; Inductors; Integrated circuits; Inverters; Switches; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition (APEC), 2014 Twenty-Ninth Annual IEEE
  • Conference_Location
    Fort Worth, TX
  • Type

    conf

  • DOI
    10.1109/APEC.2014.6803812
  • Filename
    6803812