• DocumentCode
    1337021
  • Title

    Digital Approaches to ISI-Mitigation in High-Resolution Oversampled Multi-Level D/A Converters

  • Author

    Risbo, Lars ; Hezar, Rahmi ; Kelleci, Burak ; Kiper, Halil ; Fares, Mounir

  • Author_Institution
    Texas Instrum. Denmark A/S, Lyngby, Denmark
  • Volume
    46
  • Issue
    12
  • fYear
    2011
  • Firstpage
    2892
  • Lastpage
    2903
  • Abstract
    A new digital signal processing approach to shaping intersymbol interference (ISI) and static mismatch errors simultaneously in oversampled multi-level digital to analog converters (DAC) has recently been proposed. In this paper, a mathematical framework is established for analyzing ISI errors as well as comparing the ISI sensitivities of different mismatch shaping algorithms. The framework is used to analyze the fundamental problems of popularly used algorithms such as data-weighted-averaging (DWA) in the presence of nonlinear ISI: Large-signal even-order distortion and frequency modulated harmonics at low signal levels. The new ISI-shaping algorithm results in significant improvement over previous schemes including the modified Mismatch Shaper (MMS) which also addresses ISI error. The new ISI shaper, while increasing the digital complexity, practically eliminates the need for conventional ISI mitigation techniques such as time consuming, layout-critical, non-automated and process specific analog design methods. The advantages of ISI shaping is further verified on an experimental audio DAC with simple non-return-to-zero (NRZ) current steering segments implemented in a 45 nm CMOS process and running off a single-phase clock of only 3.072 MHz.
  • Keywords
    CMOS integrated circuits; digital-analogue conversion; distortion; interference suppression; intersymbol interference; CMOS process; ISI mitigation techniques; ISI-shaping algorithm; data-weighted-averaging; digital signal processing approach; frequency 3.072 MHz; frequency modulated harmonics; high-resolution oversampled multilevel D/A converters; intersymbol interference; large-signal even-order distortion; mismatch shaping algorithms; modified mismatch shaper; process specific analog design methods; simple non-return-to-zero current steering segments; single-phase clock; size 45 nm; static mismatch errors; Delta-sigma modulation; Frequency modulation; Harmonic analysis; Intersymbol interference; Mathematical model; Noise measurement; Audio; DAC; ISI-shaping; current-steering DAC; data-weighted averaging; digital-to-analog conversion; dynamic element matching; frequency modulation; idle tones; intersymbol-interference (ISI); mismatch shaping; noise shaping; non-return-to-zero (NRZ); out-of-band noise; sigma-delta modulation; vector quantizer;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2011.2164965
  • Filename
    6032045