Real-Time STAP demonstration on an embedded high performance computer

Author

Linderman, Mark H. ; Linderman, Richard W.

Author_Institution

Rome Lab., NY, USA

Volume

13

Issue

3

fYear

1998

fDate

3/1/1998 12:00:00 AM

Firstpage

15

Lastpage

31

Abstract

Real-time signal processing for a 16-channel phased array radar, including space-time adaptive processing (STAP) algorithms, has been implemented using a 29-node ruggedized version of an Intel Paragon. Techniques employed to efficiently implement each step of the signal processing are discussed. An overall throughput of 3.15 GFLOPS and processing efficiency of 48% has been achieved, indicating that embedded high performance computers can deliver a significant percentage of their advertised peak throughput under real system constraints

Keywords

adaptive signal processing; aerospace computing; airborne radar; array signal processing; phased array radar; radar signal processing; real-time systems; 3.15E09 FLOPS; 48 percent; Intel; embedded high performance computer; phased array radar; processing efficiency; real-time STAP demonstration; real-time signal processing; rugged design; space-time adaptive processing; Adaptive arrays; Adaptive signal processing; Array signal processing; Embedded computing; High performance computing; Phased arrays; Radar signal processing; Signal processing algorithms; Spaceborne radar; Throughput;

fLanguage

English

Journal_Title

Aerospace and Electronic Systems Magazine, IEEE

Publisher

ieee

ISSN

0885-8985

Type

jour

DOI

10.1109/62.659859

Filename

659859