Effects of CW interference on phase-locked loop performance

This paper focuses on the modeling and analysis of phase-locked loops in the presence of continuous wave (CW) interference such that the operating vulnerability to CW jamming and interference can be accessed. The loop phase error is characterized, and the conditions under which the loop remains locked in frequency to the desired carrier are presented. Analysis is conducted for arbitrary offsets of carrier and interferer signal frequencies relative to the quiescent voltage-controlled oscillator (VCO) frequency. The results show that loop performance depends not only on the frequency difference between the desired signal and interferer, but also on the frequency offset between the quiescent VCO oscillation and desired carrier. The vulnerability of the loop to the presence of interference increases if interferer and desired signal spectral locations are in opposite sides of quiescent VCO frequency