• DocumentCode
    1339255
  • Title

    Null holographic test structures for the measurement of overlay and its statistical variation

  • Author

    AbuGhazaleh, S.A. ; Christie, P. ; Agrawal, V. ; Stevenson, J.T.M. ; Walton, A.J. ; Gundlach, A.M. ; Smith, S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Delaware Univ., Newark, DE, USA
  • Volume
    13
  • Issue
    2
  • fYear
    2000
  • fDate
    5/1/2000 12:00:00 AM
  • Firstpage
    173
  • Lastpage
    180
  • Abstract
    Results are presented on the use of null wire segment holograms for the in-line assessment of mask alignment errors in the integrated circuit fabrication process. Process variations are detected by measuring the light intensity generated by a hologram designed to project a null image. To detect alignment errors, the mask for the wire segment hologram (WSH) is distributed between two mask layers. If the two sets of diffracting structures defined by the masks are transferred to the wafer with perfect registration, the result is an area of light cancellation (null) in the image plane. Increased mask misalignment leads to imperfect wavefront cancellation, which is manifested as an increase in light intensity in the null region. In order to characterize misalignment under controlled conditions, the two portions of the holographic test structure were initially recombined into a single structure but with intentional misalignment between the two portions designed into the mask. The technique was then used to characterize the alignment errors between two separate masks with the actual fabricated offsets measured using atomic force microscopy. Initial results indicate the technique is capable of resolving 0.1-μm mask misalignment for a 1-μm minimum feature process
  • Keywords
    atomic force microscopy; computer-generated holography; integrated circuit interconnections; integrated circuit manufacture; integrated circuit measurement; masks; production testing; 1 micron; atomic force microscopy; diffracting structures; fabricated offsets; imperfect wavefront cancellation; integrated circuit fabrication process; light cancellation; light intensity; mask alignment errors; mask misalignment; minimum feature process; null holographic test structures; overlay measurement; perfect registration; statistical variation; wire segment hologram; Atomic force microscopy; Atomic measurements; Circuit testing; Diffraction; Fabrication; Force measurement; Holography; Image segmentation; Integrated circuit measurements; Wire;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/66.843633
  • Filename
    843633