DocumentCode
1343811
Title
Guest editorial: low-power electronics and design
Author
Roy, Kaushik ; Lee, D.T.
Author_Institution
Purdue University
Volume
8
Issue
3
fYear
2000
fDate
6/1/2000 12:00:00 AM
Firstpage
233
Lastpage
234
Keywords
Algorithm design and analysis; CMOS technology; Design methodology; Integrated circuit interconnections; Low power electronics; Power dissipation; Power system interconnection; Power system reliability; Threshold voltage; Very large scale integration;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2000.845890
Filename
845890
Link To Document