DocumentCode
1343882
Title
Testing of random access memories: theory and practice
Author
Veenstra, P.K. ; Beenker, F.P.M. ; Koomen, J.J.M.
Author_Institution
Philips Res. Labs., Eindhoven, Netherlands
Volume
135
Issue
1
fYear
1988
fDate
2/1/1988 12:00:00 AM
Firstpage
24
Lastpage
28
Abstract
Testing of random access memories (RAMs) gives more and more problems. The dimensions are growing rapidly and the denser devices result in more complex failure modes. The goal of the authors´ research was the evaluation of the existing test patterns in SRAM testing. A large diversity of test patterns was executed on silicon SRAM wafers and results were compared. The results affirm the conclusions: that the use of a well-defined fault model results into a more efficient test for permanent faults; and that the two-coupling fault model appears to be very efficient
Keywords
fault location; integrated circuit testing; integrated memory circuits; random-access storage; RAMs; SRAM testing; Si; random access memories; test patterns; two-coupling fault model;
fLanguage
English
Journal_Title
Electronic Circuits and Systems, IEE Proceedings G
Publisher
iet
ISSN
0143-7089
Type
jour
Filename
6617
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