DocumentCode
1347878
Title
The state reduction of nondeterministic finite-state machines
Author
Damiani, Maurizio
Author_Institution
Dipt. di Elettronica e Inf., Padova Univ., Italy
Volume
16
Issue
11
fYear
1997
fDate
11/1/1997 12:00:00 AM
Firstpage
1278
Lastpage
1291
Abstract
Nondeterministic finite-state machines (NFSM´s) are a powerful tool for specifying the desired behavior of a sequential system along with its degrees of freedom. Moreover, nondeterministic machines arise naturally when considering the optimization problem of interacting synchronous circuits or deterministic finite-state machines. Yet, NFSM´s have been considered only recently in the literature. In this paper, we present algorithms for synthesizing a minimum state implementation of a specification NFSM. The algorithm is a generalization of the classical method for incompletely specified machines, with several modifications. We also introduce the notion of equivalence between compatibility classes and a novel formulation of the closure problem to eliminate unnecessary classes and implications, so as to speed up substantially the search of the optimum solution. A novel BDD-based implementation technique is also presented, which avoids the explicit representation of the transition relation of the original NFSM
Keywords
Boolean functions; circuit optimisation; finite state machines; logic CAD; sequential circuits; BDD-based implementation technique; closure problem; compatibility classes; equivalence; interacting synchronous circuits; minimum state implementation; nondeterministic finite-state machines; optimization problem; sequential system; state reduction; Automatic logic units; Boolean functions; Circuit synthesis; Data structures; Digital systems; Helium; Minimization; Processor scheduling; Registers; Resource management;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.663818
Filename
663818
Link To Document