DocumentCode
1349272
Title
Fractional-
Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial
Author
Su, Pin-En ; Pamarti, Sudhakar
Author_Institution
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
Volume
56
Issue
12
fYear
2009
Firstpage
881
Lastpage
885
Abstract
The fundamentals and state of the art in fractional-N phase-locked-loop (PLL)-based frequency synthesis are reviewed. Particular emphasis is placed on delta-sigma fractional-N PLLs and quantization noise and fractional spur suppression techniques for wide-bandwidth applications.
Keywords
delta-sigma modulation; digital phase locked loops; frequency synthesizers; delta-sigma fractional-N PLL; fractional spur suppression techniques; fractional-N phase-locked-loop; frequency synthesis; quantization noise; Delta-sigma $(Delta{-}Sigma)$ modulators; frequency synthesizers; phase-locked loops (PLLs);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2009.2035258
Filename
5345790
Link To Document