DocumentCode
1354309
Title
Multi-step capacitor-splitting SAR ADC
Author
Lin, James ; Yu, Weimin ; Temes, Gabor C.
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Oregon State Univ., Corvallis, OR, USA
Volume
46
Issue
21
fYear
2010
fDate
10/1/2010 12:00:00 AM
Firstpage
1426
Lastpage
1428
Abstract
A new architecture is proposed which reduces the power consumption and capacitor area in successive approximation register (SAR) analogue-to-digital converters (ADCs). Two identical capacitor-splitting capacitor arrays are used in a two-step process for quantisation, and this significantly reduces the switching power and capacitor area.
Keywords
analogue-digital conversion; capacitors; analogue-to-digital converters; capacitor-splitting capacitor arrays; multistep capacitor-splitting SAR ADC; power consumption; quantisation; successive approximation register; switching power;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2010.1713
Filename
5604789
Link To Document