DocumentCode
135753
Title
Generalized Discrete Event Specifications of logic gates
Author
Hamri, Maamar ; Naamane, Aziz ; Giambiasi, Norbert
Author_Institution
LSIS, Aix-Marseille Univ., Marseille, France
fYear
2014
fDate
11-14 Feb. 2014
Firstpage
1
Lastpage
6
Abstract
In this paper, it is shown how the Generalized Discrete Event Specification paradigm can be advantageously used for logic gate modeling and simulation. The proposed approach is based on the use of piecewise-linear approximations for the representations of logic gates. It is noticed that the modeling part is independent from the simulation one.
Keywords
logic gates; piecewise linear techniques; GDEVS; generalized discrete event specifications; logic gate modeling; piecewise-linear approximations; Delays; Logic gates; Trajectory;
fLanguage
English
Publisher
ieee
Conference_Titel
Multi-Conference on Systems, Signals & Devices (SSD), 2014 11th International
Conference_Location
Barcelona
Type
conf
DOI
10.1109/SSD.2014.6808764
Filename
6808764
Link To Document