Scaling Properties of $\hbox {Ge}$ – $\hbox {Si}_{x}\hbox {Ge}_{1 - x}$ Core–Shel

We demonstrate the fabrication of high-performance Ge-Si_xGe_1-x core-shell nanowire (NW) field-effect transistors with highly doped source (S) and drain (D) and systematically investigate their scaling properties. Highly doped S and D regions are realized by low-energy boron implantation, which enables efficient carrier injection with a contact resistance much lower than the NW resistance. We extract key device parameters, such as intrinsic channel resistance, carrier mobility, effective channel length, and external contact resistance, as well as benchmark the device switching speed and on/off current ratio.